scalable coherent interface

Computing Dictionary

Scalable Coherent Interface definition

hardware, protocol
(SCI) The ANSI/IEEE 1596-1992 standard that defines a point-to-point interface and a set of packet protocols. The SCI protocols use packets with a 16-byte header and 16, 64, or 256 data bytes. Each packet is protected by a 16-bit CRC code.
The standard defines 1 Gbit/second serial fiber-optic links and 1 Gbyte/second parallel copper links. SCI has two unidirectional links that operate concurrently.
The SCI protocols support shared memory by encapsulating bus requests and responses into SCI request and response packets. Packet-based handshake protocols guarantee reliable data delivery. A set of cache coherence protocols are defined to maintain cache coherence in a shared memory system.
Message passing is supported by a compatible subset of the SCI protocols. This protocol subset does not invoke SCI cache coherency protocols.
SCI uses 64-bit addressing and the most significant 16 bits are used for addressing up to 64K nodes.
http://uni-paderborn.de/pc2/systems/sci/.
[Applications?]
(1999-03-22)
The Free On-line Dictionary of Computing, © Denis Howe 2010 http://foldoc.org
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