An XNF to Verilog translator by Martin J. Colley email@example.com. This program was written by a postgraduate student as part of his M.Sc course. It was designed to form part a larger system operating with the Cadence Edge 2.1 framework. This should be born in mind when considering the construction and/or operation of the program. (ftp://punisher.caltech.edu/pub/dank/xnf2ver.tar.Z).